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USC and Quantum Elements have validated that topological surface codes can scale for error suppression on IBM's non-native heavy-hex lattice architecture. By combining a specialized "fold-unfold" SWAP embedding with robust dynamical decoupling, the team successfully mitigated connectivity-induced noise across 156 qubits, proving that physical processors do not require square-grid geometries to achieve distance scaling. This breakthrough also introduces a new SPAM-aware fidelity metric to accurately assess logical error rates without assuming stationary noise conditions.
USC and Quantum Elements Demonstrate Surface Code Scaling on IBM Heavy-Hex Processors
USC and Quantum Elements successfully demonstrated subthreshold surface code scaling on IBM Heavy-Hex processors, overcoming connectivity challenges with a "fold-unfold" SWAP embedding and robust dynamical decoupling. This work, published in Nature Communications, validates that physical quantum processors can achieve distance-scaling error suppression on non-native geometries and introduces a SPAM-aware Entanglement Fidelity metric for accurate logical error rate assessment. The research utilized 156-qubit IBM Heron processors and builds upon their previous collaborative work in classical digital-twin simulation. The post USC and Quantum Elements Demonstrate Surface Code Scaling on IBM Heavy-Hex Processors appeared first on Quantum Computing Report.
Surface code on heavy-hex. Researchers from the University of Southern California (USC) and quantum software developer Quantum Elements have demonstrated subthreshold surface code scaling on non-native processor geometries, publishing their peer-reviewed findings in…
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