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This research introduces a novel approach to compiling quantum circuits for trapped-ion systems by fine-tuning large language models on shuttling architectures. The study demonstrates that these LLMs can generalize to unseen hardware layouts, such as four-way junctions, while reducing the physical qubit movement required during execution by up to 15%. This marks a significant step toward layout-independent compilation strategies for scalable quantum processors.
Shuttling Compiler for Trapped-Ion Quantum Computers Based on Large Language Models
arXiv:2512.18021v3 Announce Type: replace-cross Abstract: We present the first shuttling compiler based on large language models (LLMs) for trapped-ion quantum computers, where qubits are shuttled between segments for gate execution and qubit storage. We fine-tune pre-trained LLMs on examples from linear and branched one-dimensional shuttling architectures. Thus, we obtain a layout-independent compilation strategy that learns the required shuttling operations directly from data. Using benchmark circuits with up to 16 qubits, such fine-tuned LLMs can now generate valid schedules for shuttling architectures. Notably, we also obtain a valid schedule for a previously unseen four-way junction layout. This demonstrates that trained LLMs can generalize to layouts not encountered during training. For various architectures, LLM-based schedules improve upon state-of-the-art baseline compiler results, reducing the shuttling effort by up to 15%.
Abstract:We present the first shuttling compiler based on large language models (LLMs) for trapped-ion quantum computers, where qubits are shuttled between segments for gate execution and qubit storage. We fine-tune pre-trained LLMs on examples from linear and branched one-dimensional shuttling architectures. Thus, we obtain a layout-independent compilation strategy that learns the required shuttling operations directly from data. Using benchmark circuits with up to 16 qubits, such fine-tuned LLMs can now generate valid schedules for shuttling architectures. Notably, we also obtain a valid schedule for a previously unseen four-way junction layout. This demonstrates that trained LLMs can generalize to layouts not encountered during training. For various architectures, LLM-based schedules improve upon state-of-the-art baseline compiler results, reducing the shuttling effort by up to 15%.
Quantum Physics (quant-ph); Emerging Technologies (cs.ET); Machine Learning (cs.LG)
arXiv:2512.18021 [quant-ph]
(or arXiv:2512.18021v3 [quant-ph] for this version)
Full text under the publisher's open licence · 139 words
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