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This study delivers critical empirical data on optimizing error mitigation and shot allocation strategies for superconducting quantum processors under strict execution budgets. By rigorously separating sampling uncertainty from device-induced noise across varying circuit depths, it clarifies the precise conditions where mitigation overhead yields tangible accuracy gains versus when finite-shot fluctuations negate those benefits. The findings offer essential guidance for researchers aiming to maximize fidelity on current IBM Quantum hardware without relying on unlimited sampling resources.
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Hardware-Efficient Error Mitigation and Shot-Efficient Sampling on IBM Quantum Hardware

arXiv2 min read

arXiv:2608.28535v1 Announce Type: new Abstract: We experimentally study error mitigation and finite-shot sampling on superconducting quantum hardware under a constrained execution budget. The study combines calibration-aware qubit selection, circuit-depth scaling, zero-noise extrapolation, dynamical decoupling, readout-error mitigation, and repeated-shot estimation on an IBM Quantum processor. Experiments are organized across ideal simulation, noise-model simulation, and physical-device execution to separate sampling uncertainty from device-induced error. We investigate how mitigation performance changes with circuit depth, effective noise scale, qubit connectivity, and measurement budget, and quantify accuracy using expectation-value error, mean-squared error, statistical uncertainty, and mitigation gain. A fixed hardware-execution budget is used to evaluate shot allocation strategies and repeated measurements without relying on unlimited sampling. The resulting analysis provides a hardware-aware characterization of when mitigation improves expectation-value estimation and when finite-shot fluctuations offset the benefit of additional mitigation overhead. The implementation uses contemporary Qiskit and IBM Quantum Runtime workflows and is designed to provide reproducible experimental evidence for error-mitigation studies on current quantum processors.

Abstract:We experimentally study error mitigation and finite-shot sampling on superconducting quantum hardware under a constrained execution budget. The study combines calibration-aware qubit selection, circuit-depth scaling, zero-noise extrapolation, dynamical decoupling, readout-error mitigation, and repeated-shot estimation on an IBM Quantum processor. Experiments are organized across ideal simulation, noise-model simulation, and physical-device execution to separate sampling uncertainty from device-induced error. We investigate how mitigation performance changes with circuit depth, effective noise scale, qubit connectivity, and measurement budget, and quantify accuracy using expectation-value error, mean-squared error, statistical uncertainty, and mitigation gain. A fixed hardware-execution budget is used to evaluate shot allocation strategies and repeated measurements without relying on unlimited sampling. The resulting analysis provides a hardware-aware characterization of when mitigation improves expectation-value estimation and when finite-shot fluctuations offset the benefit of additional mitigation overhead. The implementation uses contemporary Qiskit and IBM Quantum Runtime workflows and is designed to provide reproducible experimental evidence for error-mitigation studies on current quantum processors.

16 pages, 9 figures, 6 tables. Experiments performed on IBM Quantum hardware using Qiskit 2.5.0 and Qiskit Runtime 0.48.0. Includes hardware calibration analysis, zero-noise extrapolation, dynamical decoupling, readout mitigation, adaptive shot allocation, repeated hardware experiments, and scaling studies

arXiv:2608.28535 [quant-ph]

(or arXiv:2608.28535v1 [quant-ph] for this version)

https://doi.org/10.48550/arXiv.2608.28535 arXiv-issued DOI via DataCite (pending registration)

Full text under the publisher's open licence · 208 words

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