aiqbench analysis
This survey examines the convergence of FPGA hardware architectures and neural networks to enable autonomous onboard computing for advanced space missions. It specifically addresses critical implementation challenges such as radiation tolerance, flexibility, and cost-effectiveness required for deep-space exploration. The work identifies current research gaps in deploying AI accelerators within the harsh environment of spacecraft systems.
FPGA-Based Neural Network Accelerators for Space Applications: A Survey
arXiv:2504.16173v3 Announce Type: replace-cross Abstract: Space missions are becoming increasingly ambitious, necessitating high-performance onboard spacecraft computing systems. In response, field-programmable gate arrays (FPGAs) have garnered significant interest due to their flexibility, cost-effectiveness, and radiation tolerance potential. Concurrently, neural networks (NNs) are being recognized for their capability to execute space mission tasks such as autonomous operations, sensor data analysis, and data compression. This survey serves as a valuable resource for researchers aiming to implement FPGA-based NN accelerators in space applications. By analyzing existing literature, identifying trends and gaps, and proposing future research directions, this work highlights the potential of these accelerators to enhance onboard computing systems.
Abstract:Space missions are becoming increasingly ambitious, necessitating high-performance onboard spacecraft computing systems. In response, field-programmable gate arrays (FPGAs) have garnered significant interest due to their flexibility, cost-effectiveness, and radiation tolerance potential. Concurrently, neural networks (NNs) are being recognized for their capability to execute space mission tasks such as autonomous operations, sensor data analysis, and data compression. This survey serves as a valuable resource for researchers aiming to implement FPGA-based NN accelerators in space applications. By analyzing existing literature, identifying trends and gaps, and proposing future research directions, this work highlights the potential of these accelerators to enhance onboard computing systems.
Manuscript under review at ACM CSUR. Pre-print updated after 1st Major Revision
Hardware Architecture (cs.AR); Artificial Intelligence (cs.AI)
arXiv:2504.16173 [cs.AR]
(or arXiv:2504.16173v3 [cs.AR] for this version)
Full text under the publisher's open licence · 126 words
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