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This survey consolidates research on using FPGAs to accelerate neural networks for autonomous spacecraft operations, addressing critical needs like radiation tolerance and real-time data processing. It serves as a foundational reference for engineers developing next-generation onboard computing architectures where flexibility and reliability are paramount.
FPGA-Based Neural Network Accelerators for Space Applications: A Survey
arXiv:2504.16173v4 Announce Type: replace-cross Abstract: Space missions are becoming increasingly ambitious, necessitating high-performance onboard spacecraft computing systems. In response, field-programmable gate arrays (FPGAs) have garnered significant interest due to their flexibility, cost-effectiveness, and radiation tolerance potential. Concurrently, neural networks (NNs) are being recognized for their capability to execute space mission tasks such as autonomous operations, sensor data analysis, and data compression. This survey serves as a valuable resource for researchers aiming to implement FPGA-based NN accelerators in space applications. By analyzing existing literature, identifying trends and gaps, and proposing future research directions, this work highlights the potential of these accelerators to enhance onboard computing systems.
Abstract:Space missions are becoming increasingly ambitious, necessitating high-performance onboard spacecraft computing systems. In response, field-programmable gate arrays (FPGAs) have garnered significant interest due to their flexibility, cost-effectiveness, and radiation tolerance potential. Concurrently, neural networks (NNs) are being recognized for their capability to execute space mission tasks such as autonomous operations, sensor data analysis, and data compression. This survey serves as a valuable resource for researchers aiming to implement FPGA-based NN accelerators in space applications. By analyzing existing literature, identifying trends and gaps, and proposing future research directions, this work highlights the potential of these accelerators to enhance onboard computing systems.
48 pages, 4 figures, 4 tables. Author's accepted manuscript, published online in ACM Computing Surveys on 7 October 2026. This version replaces the April 2025 preprint
Hardware Architecture (cs.AR); Artificial Intelligence (cs.AI)
B.7.1; C.3; I.2.6; J.2
arXiv:2504.16173 [cs.AR]
(or arXiv:2504.16173v4 [cs.AR] for this version)
https://doi.org/10.1145/3857797 DOI(s) linking to related resources
Full text under the publisher's open licence · 150 words
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