Skip to content

From the author

Design, review, simulate, and verify FPGA logic using explicit RTL contracts, clock and reset models, CDC analysis, timing constraints, and reproducible implementation evidence. Use for synthesizable HDL, fixed-point arithmetic, handshakes, testbenches, resource tradeoffs, timing closure, and FPGA release or bring-up planning. Do not use for ordinary MCU firmware, generic circuit design, a substitute vendor-tool manual, or unsupported claims of hardware or timing signoff.

Install

npx skills add magnus919/agent-skills --skill fpga-development -a claude-code

Installs to .claude/skills/fpga-development/ · Each command fetches the skill straight from GitHub with the open skills CLI.

Download .zip

Byte-identical to the scanned commit, with the repository’s licence and a SOURCE.txt.

Want your agent to suggest skills while you type? See how to use skills from your IDE.

Safety checks on SKILL.md

  • Ships scripts we have not reviewedLow

Why 78

Security85
Provenance66
Maintenance100
Licence100
Adoption37

aiqbench computes the trust score from public signals. It is not a security audit, so read a skill before you install it.

Similar skills

Closest to this one by what they do and when they are used.

Ratings & reviews

—

no reviews

Tried this skill? Rate it to help others. Sign in

    Discussion

    Join the discussion. Sign in