aiqbench analysis
This collaboration directly addresses a critical physical barrier in photonic quantum computing by targeting Line Edge Roughness to minimize photon loss in silicon waveguides. Reducing these optical losses is essential for lowering the qubit overhead required for fault-tolerant error correction in light-based QPUs. The partnership leverages advanced DUV and EUV lithography to enable the manufacturing of utility-scale photonic chips necessary for commercial quantum advantage.
Xanadu and ASML Partner to Optimize Lithography Processes for Ultra-Low-Loss Quantum Photonics
Xanadu Quantum Technologies and ASML are collaborating to improve lithography processes for quantum photonics, aiming to reduce optical signal loss in silicon photonic circuits. Their research focuses on minimizing Line Edge Roughness (LER) caused by DUV and EUV photolithography, which scatters photons in optical waveguides, with the goal of achieving ultra-smooth waveguide sidewalls for fault-tolerant quantum error correction. The post Xanadu and ASML Partner to Optimize Lithography Processes for Ultra-Low-Loss Quantum Photonics appeared first on Quantum Computing Report.
Publicly traded photonic quantum computing developer Xanadu Quantum Technologies (NASDAQ/TSX: XNDU) and semiconductor lithography leader ASML (NASDAQ: ASML) have entered…
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