aiqbench analysis
Quobly has validated the feasibility of integrating quantum readout, single-qubit gates, and two-qubit gates onto a single chip using industrial 300mm FD-SOI silicon. This milestone confirms that co-integrating quantum dot arrays with classical control electronics is achievable on commercial manufacturing lines, a critical step toward scaling to million-qubit systems by 2032. The achievement also establishes a proprietary cryogenic PDK, enabling broader adoption of VLSI principles for future quantum hardware development.
Quobly Demonstrates Single-Chip Readout and Gates on 300mm Industrial Silicon Process
Quobly has successfully demonstrated single-chip execution of qubit readout, single-qubit gates, and two-qubit gates on its QSOI® architecture, fabricated on an industrial 300mm silicon process at STMicroelectronics. This achievement validates their technology transfer strategy, allowing co-integration of quantum and classical circuitry. With plans for cloud access to their Alloy Pioneer system by late 2026 and a long-term target of one million qubits by 2032, Quobly is advancing its commercial and scaling roadmap, supported by significant Series A funding and strategic partnerships. The post Quobly Demonstrates Single-Chip Readout and Gates on 300mm Industrial Silicon Process appeared first on Quantum Computing Report.
Silicon spin-qubit hardware developer Quobly has achieved single-chip execution of qubit readout, single-qubit gates, and two-qubit gates on its proprietary QSOI® architecture. The…
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