aiqbench analysis
This partnership advances silicon spin-qubit scaling by integrating advanced prototyping tools directly onto standard 300 mm FD-SOI substrates, bridging the gap between R&D and commercial manufacturing. By combining cryogenic control electronics with qubit arrays on a unified die, Quobly aims to increase density without expanding thermal footprints, targeting cloud availability for its Alloy Pioneer processor by late 2026.
Quobly and CEA-Leti Strengthen Collaboration via FAMES Pilot Line to Scale 300 mm Silicon Spin-Qubit Platform

Quobly and CEA-Leti are strengthening their collaboration through the FAMES Pilot Line, providing Quobly access to advanced processing tools for prototyping 3D integration and RF control layers for next-generation quantum processing units (QPUs). This partnership, alongside STMicroelectronics, aims to scale Quobly's QSOI® architecture, which integrates silicon spin qubits directly onto a 300 mm FD-SOI CMOS substrate. Quobly plans to offer initial cloud availability for its Alloy Pioneer processor family by late 2026, targeting large-scale, fault-tolerant silicon architectures by 2032. The post Quobly and CEA-Leti Strengthen Collaboration via FAMES Pilot Line to Scale 300 mm Silicon Spin-Qubit Platform appeared first on Quantum Computing Report.
Silicon quantum hardware developer Quobly and microelectronics research institute CEA-Leti have expanded their joint technology program, securing Quobly direct access to the European FAMES Pilot Line (FD-SOI Pilot Line…
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