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This article centers on the critical intersection of semiconductor supply chains, data center infrastructure, and AI model performance metrics such as GPU scaling and tokenomics. By analyzing how hardware constraints directly inform software architecture, it provides essential context for understanding current limitations in large-scale AI deployment.
Sources coveringInfoQ, SiliconANGLE, Latent Space, AWS
What this isA model's reading of the article and related coverage, written for aiqbench. Not the publisher's words.

Presentation: From Fab To Token - The State Of The Market

InfoQ38 min read

Jordan Nanos discusses how semiconductor constraints, data center expansion, and networking bottlenecks impact AI software architecture. Drawing from SemiAnalysis research, he shares insights on benchmark performance, GPU scaling, and tokenomics from chip fab to model inference. By Jordan Nanos

Jordan Nanos: My name is Jordan. I work at SemiAnalysis. I'm on the technical staff. I primarily work on a project called ClusterMAX, which I'm going to talk about towards the end. The topic of the presentation is From Fab to Token. I'm going to try to take you guys through a little bit of what SemiAnalysis does in terms of AI research and semiconductor supply chain research. The purpose of this is a little bit different than some of the other talks. I'm a practitioner. I use the models. I develop software. I do this in service of analysis of hardware. I would say I'm a hardware guy. We care a lot about testing the new GPUs, measuring performance, testing cloud providers. What I'm going to try and do here is give you a sense of how understanding the hardware can help inform developing great software and vice versa. To me, it's really hard for me to use AI and feel like I really understand what's going on without having any understanding of the chips, the data centers, the systems, even the entire supply chain that goes into it. I'm going to try and take you guys through some…

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