Maximize Spectral Efficiency with AI-Native RAN and NVIDIA AI Aerial

Spectrum is one of the most valuable assets in wireless communications. Over the last 30 years, telecom operators in the US have spent more than $240B to acquire wireless spectrum. A goal of a radio access network (RAN) system is to extract the maximum spectral efficiency (bits/second/Hertz) possible, which translates into more capacity, stronger network resilience with fewer dropped packets, and better economics per site.

As operators look for ways to extract more value from existing spectrum, Massive MIMO (Multiple-input, multiple-output) has become an important method for increasing capacity and improving how efficiently the network serves users.

Massive MIMO promised a revolutionary leap in spectral efficiency. However, in field deployments, the industry is operating below what the technology can theoretically achieve, leaving immense capacity unused. The root causes are fundamentally system-level problems. The network struggles to accurately track user locations, signals overlap and cause interference, and the system fails to pair users efficiently for simultaneous data transmission.

The industry has examined these challenges through a "compute-constrained" lens, treating compute as a scarce resource, forcing compromises to fit complex algorithms within the strict limitations of CPU power and performance budgets.

NVIDIA AI Aerial is changing that paradigm. With parallel computing, compute is no longer the bottleneck for operating within existing power budgets. By embracing an AI-native, highly parallelized architecture, we don't have to ask, "How can I squeeze more into the same compute?" Instead, we ask, "How can we reinvent the algorithm across the full stack to maximize the spectrum?"

This "algorithms-first" approach enables the network to finally run the complex tracking and pairing models required to close the massive MIMO performance gap.

This blog describes the benefits of GPU acceleration in the RAN, and how AI-native RAN helps close the massive MIMO performance gap. It shows how NVIDIA AI Aerial enables a new class of Layer 1 and Layer 2 algorithms designed to unlock greater spectral efficiency in real-world deployments.

Modern RAN pipelines consist of mathematically dense algorithmic tasks, with highly specific compute characteristics. A scheduler that evaluates a wider combinatorial space, a channel estimator that learns from richer observations, or a beamformer that adapts jointly across users can improve throughput and quality of service for user applications. Table 1 is a breakdown of the highest-impact RAN workloads, their compute characteristics, and why GPU acceleration is required to execute them effectively:

Table 1. Value of GPU by RAN workload

The following sections review two workloads—beamforming and link adaptation—and explore how GPUs unlock new spectral efficiency gains.

Beamforming quality determines how effectively a network converts channel knowledge into usable throughput. Classical methods are effective but are shaped by computational compromise, relying on simplified models to meet limited budgets. As systems move to higher antenna counts and denser MU-MIMO operation, these simplifications result in lost signal-to-interference-plus-noise ratio (SINR) and lower realized throughput.

ML-based beamforming weight generation solves this by using richer channel information for weights, though it raises the compute burden sharply. NVIDIA analysis shows that in a 64T64R MU-MIMO scenario with 16 users and 2 layers per user, where users are randomly assigned SNRs in the [0-20] dB range, AI beamforming requires significantly more FLOPs than traditional regularized Zero Forcing (rZF), but this increase in compute produces a spectral efficiency gain of up to 1.62x higher throughput at 32 layers compared to the traditional zero-forcing beamforming algorithm.

Even at a lower number of layers, ML-beamforming delivers 1.28x throughput improvement.

Complexity per cell Spectral efficiency gains 1.28x at 16 layers 1.62x at 32 layers

Figure 1. Throughput of ML-based beamforming compared to rZF beamforming

GPU compute enables higher-quality beam weight generation at the scale and latency required for RAN deployment. This connects directly to field validation. SoftBank and NVIDIA recently reported stable outdoor 16-layer massive MU-MIMO operation on a GPU-based AI-RAN platform. The trial delivered roughly 3x the spectral efficiency of a conventional 4-layer baseline. GPU value is not abstract acceleration; it is the practical ability to sustain higher-order spatial multiplexing in a real system.

DRL link adaptation Link adaptation is a complex MAC-layer control function. The scheduler must repeatedly pick a modulation and coding scheme (MCS) to maximize throughput while keeping block error rates (BLER) near targets for QOS and maximizing spectral efficiency under changing mobility and interference conditions.

Traditional link adaptation schemes, such as outer-loop link adaptation (OLLA) implemented in vector engines in CPUs, are lightweight, reacting to feedback through hand-crafted predefined logic. Deep reinforcement learning (DRL) link adaptation changes this by learning the MCS-selection policy directly from observed radio behavior.

A DRL agent uses channel quality indicator (CQI) history, ACK/NACK feedback, and short-term channel evolution to adapt to site-specific conditions in real time. Early NVIDIA engineering results show a 1.3x throughput gain over baseline OLLA at the cell edge when combined with channel-orthogonality-based user pairing. Further improvements are expected when DRL-LA is combined with more advanced MU-MIMO pairing algorithms.

Figure 2. Result for DRL link adaptation compared to OLLA

The technical turning point is latency scaling. A small, distilled model can run on a CPU equipped with vector engines. The highest spectral efficiency gains require a larger model handling richer MU-MIMO conditions at large batch sizes, while maintaining stable BLER below target.

Figure 3. DRL-link adaptation model inference latency compared to batch size

As shown in Figure 3, the GPU-based architecture stays below the ~30 μs typical reference budget across the tested user range, even for a 396K-parameter model. In contrast, a single-core CPU implementation exceeds the latency budget starting with the first scheduled user. CPU inference can support only a low-