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This empirical study isolates the critical hardware constraints of speculative decoding, demonstrating that speedups on consumer Apple Silicon depend entirely on genuine batch-parallel verification rather than naive implementation. The research quantifies how specific backend configurations can inadvertently serialize parallel operations, limiting performance gains despite theoretical advantages in memory bandwidth utilization. These findings provide essential guidance for optimizing inference pipelines where latency reduction is the primary objective without compromising output distribution fidelity.
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Lossless but Not Free: An Empirical Anatomy of Speculative Decoding on Consumer Hardware

arXiv3 min read

arXiv:2607.17283v1 Announce Type: new Abstract: Single-stream autoregressive decoding of large language models is bound by memory bandwidth: each generated token requires one full forward pass through the target model, and successive passes cannot be parallelized. Speculative decoding restructures this computation: a small draft model proposes $K$ tokens autoregressively, the target model scores all of them in one batched pass, and a rejection-sampling rule provably preserves the target model's output distribution. We present a from-scratch, device-agnostic (CUDA/MPS/CPU) implementation and an empirical study across five draft/target backend configurations on a consumer Apple-silicon laptop. Distribution equivalence is verified at three levels, culminating in a two-sample test over roughly 9,200 real-model tokens per method ($\chi^2 = 162.5$, dof $= 200$, $p = 0.976$) and exact greedy-sequence agreement. The best configuration reaches a measured $1.61\times$ wall-clock speedup at $K=6$, on an acceptance profile declining from 69.7% at $K=1$ to 37.8% at the optimum, while three of five configurations decelerate, either because the draft fails to out-speed a small target or because the quantized Metal backend executes "parallel" verification serially, an effect we isolate and quantify. The failures are as instructive as the successes: speculative decoding pays off only when verification is genuinely batch-parallel and the draft/target latency gap is real.

Abstract:Single-stream autoregressive decoding of large language models is bound by memory bandwidth: each generated token requires one full forward pass through the target model, and successive passes cannot be parallelized. Speculative decoding restructures this computation: a small draft model proposes $K$ tokens autoregressively, the target model scores all of them in one batched pass, and a rejection-sampling rule provably preserves the target model's output distribution. We present a from-scratch, device-agnostic (CUDA/MPS/CPU) implementation and an empirical study across five draft/target backend configurations on a consumer Apple-silicon laptop. Distribution equivalence is verified at three levels, culminating in a two-sample test over roughly 9,200 real-model tokens per method ($\chi^2 = 162.5$, dof $= 200$, $p = 0.976$) and exact greedy-sequence agreement. The best configuration reaches a measured $1.61\times$ wall-clock speedup at $K=6$, on an acceptance profile declining from 69.7% at $K=1$ to 37.8% at the optimum, while three of five configurations decelerate, either because the draft fails to out-speed a small target or because the quantized Metal backend executes "parallel" verification serially, an effect we isolate and quantify. The failures are as instructive as the successes: speculative decoding pays off only when verification is genuinely batch-parallel and the draft/target latency gap is real.

15 pages, 5 figures, 4 tables. Code, benchmark harness, and all result artifacts: this https URL

Artificial Intelligence (cs.AI); Machine Learning (cs.LG)

arXiv:2607.17283 [cs.AI]

(or arXiv:2607.17283v1 [cs.AI] for this version)

https://doi.org/10.48550/arXiv.2607.17283 Focus to learn more arXiv-issued DOI via DataCite (pending registration)

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Full text under the publisher's open licence · 313 words

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