aiqbench analysis
This research presents a hybrid oscillator-qubit architecture for simulating nonunitary linear dynamics, offering significant resource savings by replacing large ancilla qubit registers with single-mode oscillators. The study demonstrates that this approach achieves superalgebraic error decay and provides practical benchmarks for solving discretized partial differential equations like heat diffusion on current quantum hardware.
Gate-Level Quantum Simulation of Nonunitary Linear Dynamics with Hybrid Oscillator-Qubit Architecture
arXiv:2605.10708v2 Announce Type: replace Abstract: We realize the one-mode unitary dilation of nonunitary linear dynamics as a gate-level hybrid oscillator--qubit architecture. An oscillator encodes the kernel by state preparation and postselection, while a qubit register simulates the discretized operator for $\dot u=-(L+iH)u$, including discretized PDEs. One oscillator replaces the $O(\log M_a)$ ancilla qubits in a DV $M_a$-term quadrature register. The ideal kernel state's squeezed-Fock projection error decays superalgebraically with cutoff $N$ for Schwartz-class kernels and stretched-exponentially under stronger joint decay and smoothness conditions. Its generic stellar rank $N-1$ makes $N$ a measure of the state's non-Gaussian resource. A $p$th-order product formula requires $O(t^{1+1/p}N_{\mathrm{Fock}}^{(p+1)/(2p)}\epsilon_t^{-1/p})$ worst-case Trotter steps for oscillator dimension $N_{\mathrm{Fock}}$, up to generator-dependent commutator factors. A perturbation bound separates scaled-map error from physical postselection probability. We benchmark Law--Eberly synthesis and assess variational SNAP+D state preparation for heat equations. Full circuit maps of one-dimensional heat and non-normal advection--diffusion instances up to $D=32$ have at most $1.48\%$ fixed-scale error and $4.68\times10^{-4}$ conditional infidelity over all computational-basis inputs. At the same kernel parameters, a $4\times4$ two-dimensional stress case reaches $7.40\%$ fixed-scale error as stronger damping reduces the reference norm, with worst-input conditional infidelity $6.20\times10^{-3}$. At the prescribed DV sizing, the hybrid route has smaller fixed-scale error in all ten instances, while the DV route accepts with fewer repetitions in every instance. This block-by-block finite-size resource account identifies when one qumode can replace a discretized ancilla register.
Abstract:We realize the one-mode unitary dilation of nonunitary linear dynamics as a gate-level hybrid oscillator--qubit architecture. An oscillator encodes the kernel by state preparation and postselection, while a qubit register simulates the discretized operator for $\dot u=-(L+iH)u$, including discretized PDEs. One oscillator replaces the $O(\log M_a)$ ancilla qubits in a DV $M_a$-term quadrature register. The ideal kernel state's squeezed-Fock projection error decays superalgebraically with cutoff $N$ for Schwartz-class kernels and stretched-exponentially under stronger joint decay and smoothness conditions. Its generic stellar rank $N-1$ makes $N$ a measure of the state's non-Gaussian resource. A $p$th-order product formula requires $O(t^{1+1/p}N_{\mathrm{Fock}}^{(p+1)/(2p)}\epsilon_t^{-1/p})$ worst-case Trotter steps for oscillator dimension $N_{\mathrm{Fock}}$, up to generator-dependent commutator factors. A perturbation bound separates scaled-map error from physical postselection probability. We benchmark Law--Eberly synthesis and assess variational SNAP+D state preparation for heat equations. Full circuit maps of one-dimensional heat and non-normal advection--diffusion instances up to $D=32$ have at most $1.48\%$ fixed-scale error and $4.68\times10^{-4}$ conditional infidelity over all computational-basis inputs. At the same kernel parameters, a $4\times4$ two-dimensional stress case reaches $7.40\%$ fixed-scale error as stronger damping reduces the reference norm, with worst-input conditional infidelity $6.20\times10^{-3}$. At the prescribed DV sizing, the hybrid route has smaller fixed-scale error in all ten instances, while the DV route accepts with fewer repetitions in every instance. This block-by-block finite-size resource account identifies when one qumode can replace a discretized ancilla register.
arXiv:2605.10708 [quant-ph]
(or arXiv:2605.10708v2 [quant-ph] for this version)
https://doi.org/10.48550/arXiv.2605.10708 Focus to learn more arXiv-issued DOI via DataCite
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