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This research demonstrates that large language models can be trained to maintain or even improve error resilience when running on unreliable, energy-efficient hardware, potentially offering a viable path toward sustainable AI inference. By leveraging modified neural scaling laws and error-correcting codes, the study suggests that fault tolerance is an emergent property of sufficiently large models rather than a degradation of performance. This finding bridges the gap between hardware limitations and model scalability, presenting a significant theoretical advance for green computing in AI.
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Fault-tolerant foundation models

arXiv2 min read

arXiv:2610.10311v1 Announce Type: new Abstract: Emerging computer hardware often trades reliability for energy efficiency; here we show that large-language models (LLMs) can be trained to tolerate this unreliability, and that rather than degrading, their error resilience actually increases as they grow. Modified neural scaling laws inferred from 40,000 GPU-hours of training runs on simulated faulty digital hardware quantify this trend and suggest that models learn to compute within "good" error-correcting codes, whose relative overhead remains finite no matter how large the model gets. This finding leads us to conjecture that appropriately trained LLMs may be formally fault-tolerant; if true, running AI inference on low energy, faulty hardware may be a path to substantial energy savings over the status quo.

Abstract:Emerging computer hardware often trades reliability for energy efficiency; here we show that large-language models (LLMs) can be trained to tolerate this unreliability, and that rather than degrading, their error resilience actually increases as they grow. Modified neural scaling laws inferred from 40,000 GPU-hours of training runs on simulated faulty digital hardware quantify this trend and suggest that models learn to compute within "good" error-correcting codes, whose relative overhead remains finite no matter how large the model gets. This finding leads us to conjecture that appropriately trained LLMs may be formally fault-tolerant; if true, running AI inference on low energy, faulty hardware may be a path to substantial energy savings over the status quo.

Machine Learning (cs.LG); Artificial Intelligence (cs.AI); Hardware Architecture (cs.AR)

arXiv:2610.10311 [cs.LG]

(or arXiv:2610.10311v1 [cs.LG] for this version)

https://doi.org/10.48550/arXiv.2610.10311 Focus to learn more arXiv-issued DOI via DataCite (pending registration)

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Full text under the publisher's open licence · 214 words

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