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This research introduces a scalable method for mapping charge defects in silicon spin qubits by using electron shuttling as an intrinsic scanning probe, directly addressing the coherence limits imposed by two-level fluctuators. By tracking decoherence across extended regions without additional hardware, this protocol offers a practical pathway to defect-aware calibration essential for building large-scale quantum processors.
Electron shuttling as a probe for charge defects
arXiv:2607.21718v1 Announce Type: new Abstract: Silicon spin qubits are a leading platform for scalable quantum computing, but their performance is limited by charge noise, widely attributed to two-level fluctuators (TLFs). The location of individual TLFs is generally unknown, and existing methods to localise them does not scale favourably with device size. Here, we show that electron shuttling turns a single mobile spin into a scanning probe of individual defects. We show that by shuttling a spin over a range of distances and tracking its coherence loss, one can localise defects along the channel and constrain their switching rate and fluctuation amplitude. Because one shuttled electron sweeps an extended region, the approach scales more favourably than previous methods. Our protocol requires no additional hardware and provides a practical route to mapping the charge-defect landscape of large silicon devices, enabling defect-aware calibration and avoidance in shuttling-based architectures.
Abstract:Silicon spin qubits are a leading platform for scalable quantum computing, but their performance is limited by charge noise, widely attributed to two-level fluctuators (TLFs). The location of individual TLFs is generally unknown, and existing methods to localise them does not scale favourably with device size. Here, we show that electron shuttling turns a single mobile spin into a scanning probe of individual defects. We show that by shuttling a spin over a range of distances and tracking its coherence loss, one can localise defects along the channel and constrain their switching rate and fluctuation amplitude. Because one shuttled electron sweeps an extended region, the approach scales more favourably than previous methods. Our protocol requires no additional hardware and provides a practical route to mapping the charge-defect landscape of large silicon devices, enabling defect-aware calibration and avoidance in shuttling-based architectures.
Quantum Physics (quant-ph); Mesoscale and Nanoscale Physics (cond-mat.mes-hall)
arXiv:2607.21718 [quant-ph]
(or arXiv:2607.21718v1 [quant-ph] for this version)
https://doi.org/10.48550/arXiv.2607.21718 Focus to learn more arXiv-issued DOI via DataCite (pending registration)
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Full text under the publisher's open licence · 239 words
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