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This research introduces amortized neural optimization (ANO) to accelerate pre-layout signal integrity design by replacing iterative black-box searches with a differentiable surrogate model. By training a global optimization policy offline, the method enables single-pass inference that significantly reduces computational costs in electronic design automation workflows. While there is a minor trade-off in optimality compared to traditional methods, the approach offers a scalable solution for complex high-speed interface scenarios like DDR5 and SerDes.
Amortized Neural Optimization for Pre-Layout Signal Integrity Design Space Exploration using Differentiable Surrogates
arXiv:2606.07463v2 Announce Type: replace-cross Abstract: Pre-layout design space exploration (DSE) for high-speed signal integrity (SI) analysis is often limited by the computational cost of simulations and iterative optimization algorithms within modern electronic design automation (EDA) workflows. While machine learning surrogate models accelerate the simulation step, optimizing designs still requires utilizing iterative black-box search methods. This iterative nature scales poorly and makes multi-corner sweeps computationally expensive. As a solution, this paper proposes amortized neural optimization (ANO) for pre-layout SI design. ANO avoids iterative black-box inference and utilizes a fully differentiable neural network surrogate model from which it extracts gradient information to train a global optimization policy. This does not solve the optimization problem repeatedly at inference, but learns the process offline, which amortizes the computational cost. Once the ANO policy is trained, it maps different channel contexts to near-optimal design parameters in a single deterministic forward pass. The efficiency and accuracy of the ANO framework are demonstrated based on three SI design scenarios, including DDR5 decision feedback equalization (DFE), 9-dimensional SerDes Tx/Rx co-equalization, and DDR3 DQS differential pair eye diagram optimization under intra-pair skew constraints. Trading roughly 10% in optimality compared to instance-specific black-box algorithms results in speedups of three to four orders of magnitude. For a large-scale 320,000-instance multi-corner SerDes sweep optimization, ANO reduces what would have taken days of computation using iterative search algorithms to a single batched forward pass that completes in milliseconds. This transforms computationally expensive SI optimization into real-time and interactive pre-layout DSE.
Abstract:Pre-layout design space exploration (DSE) for high-speed signal integrity (SI) analysis is often limited by the computational cost of simulations and iterative optimization algorithms within modern electronic design automation (EDA) workflows. While machine learning surrogate models accelerate the simulation step, optimizing designs still requires utilizing iterative black-box search methods. This iterative nature scales poorly and makes multi-corner sweeps computationally expensive. As a solution, this paper proposes amortized neural optimization (ANO) for pre-layout SI design. ANO avoids iterative black-box inference and utilizes a fully differentiable neural network surrogate model from which it extracts gradient information to train a global optimization policy. This does not solve the optimization problem repeatedly at inference, but learns the process offline, which amortizes the computational cost. Once the ANO policy is trained, it maps different channel contexts to near-optimal design parameters in a single deterministic forward pass. The efficiency and accuracy of the ANO framework are demonstrated based on three SI design scenarios, including DDR5 decision feedback equalization (DFE), 9-dimensional SerDes Tx/Rx co-equalization, and DDR3 DQS differential pair eye diagram optimization under intra-pair skew constraints. Trading roughly 10% in optimality compared to instance-specific black-box algorithms results in speedups of three to four orders of magnitude. For a large-scale 320,000-instance multi-corner SerDes sweep optimization, ANO reduces what would have taken days of computation using iterative search algorithms to a single batched forward pass that completes in milliseconds. This transforms computationally expensive SI optimization into real-time and interactive pre-layout DSE.
16 pages, 20 figures, 8 tables. This work has been submitted to the IEEE for possible publication. Copyright may be transferred without notice, after which this version may no longer be accessible
Signal Processing (eess.SP); Computational Engineering, Finance, and Science (cs.CE); Machine Learning (cs.LG)
arXiv:2606.07463 [eess.SP]
(or arXiv:2606.07463v2 [eess.SP] for this version)
Full text under the publisher's open licence · 294 words
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