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This study validates that surface codes can effectively scale and protect logical qubits on IBM Heron processors despite a geometric mismatch between the code's square-grid design and the chip's heavy-hex architecture. By integrating depth-efficient coding with dynamical decoupling, the team suppressed idle-time errors, proving that error-correction gains are achievable without hardware specifically optimized for a particular code layout.
USC And Quantum Elements’ Error Correction Technique Demonstrates Surface Code Scaling with Logical Qubits
Insider Brief PRESS RELEASE — Quantum Elements, a provider of AI-powered digital twins for quantum computing developers, and the University of Southern California (USC) today announced the publication of a Nature Communications paper showing that the surface code can improve error protection even on a quantum processor whose physical layout does not naturally match the code. The […]
Quantum Elements and USC demonstrated that surface codes can improve error protection on IBM Heron processors despite a mismatch between the code’s square-grid design and the hardware’s heavy-hex layout. The researchers combined a depth-efficient surface code with dynamical decoupling to suppress errors that accumulated while qubits were idle. The results suggest quantum processors may achieve error-correction gains without…
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