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This research introduces THEIA, a specialized dataset and benchmark enabling vision-language models to interpret analog integrated circuit layouts directly from GDSII files. By fine-tuning VLMs on thousands of designs, the study demonstrates a significant performance gap between general-purpose multimodal reasoning and domain-specific understanding of physical geometries. This advancement is critical for automating tasks in computer-aided design where precise analysis of complex circuit parasitics and structures is essential.
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THEIA: A Multimodal Dataset and Benchmark for Vision-Language Analysis of Layout

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arXiv:2609.35035v1 Announce Type: new Abstract: The integration of artificial intelligence into computer-aided design frameworks has sparked a shift in the design of analog integrated circuits (ICs), transitioning the field from using manual and algorithmic-based solutions to adopting automated and intelligent paradigms. In this scenario, the GDSII file represents the industry-standard database containing the ultimate and most accurate source of information of the analog circuit, encapsulating the complex physical geometries and parasitic realities that define tape out performance. This paper proposes THEIA, a novel dataset containing thousands of layout images paired with question-answer conversations, along with a benchmark that employs a fine-tuned vision-language model (VLM) to analyze GDSII files of analog circuits, enabling designers to interact with and query physical layouts as intuitive, meaningful entities. Experimental results using thousands of analog designs across five realistic tasks demonstrate that the proposed fine-tuned VLM outperforms state-of-the-art general-purpose VLMs by a significant margin (up to 73%), highlighting a fundamental gap between general-purpose multimodal reasoning and domain-specific layout understanding.

Abstract:The integration of artificial intelligence into computer-aided design frameworks has sparked a shift in the design of analog integrated circuits (ICs), transitioning the field from using manual and algorithmic-based solutions to adopting automated and intelligent paradigms. In this scenario, the GDSII file represents the industry-standard database containing the ultimate and most accurate source of information of the analog circuit, encapsulating the complex physical geometries and parasitic realities that define tape out performance. This paper proposes THEIA, a novel dataset containing thousands of layout images paired with question-answer conversations, along with a benchmark that employs a fine-tuned vision-language model (VLM) to analyze GDSII files of analog circuits, enabling designers to interact with and query physical layouts as intuitive, meaningful entities. Experimental results using thousands of analog designs across five realistic tasks demonstrate that the proposed fine-tuned VLM outperforms state-of-the-art general-purpose VLMs by a significant margin (up to 73%), highlighting a fundamental gap between general-purpose multimodal reasoning and domain-specific layout understanding.

Machine Learning (cs.LG)

arXiv:2609.35035 [cs.LG]

(or arXiv:2609.35035v1 [cs.LG] for this version)

https://doi.org/10.48550/arXiv.2609.35035 Focus to learn more arXiv-issued DOI via DataCite (pending registration)

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