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This research introduces a unified framework for quantum circuit cutting that simultaneously optimizes gate and wire cuts through novel grouping techniques, significantly reducing the exponential sampling overhead inherent in current methods. By formulating cut placement as a scalable graph partitioning task, the approach efficiently handles large circuits while providing diagnostic feedback on their suitability for decomposition. This advancement directly addresses critical resource constraints on near-term quantum hardware by maximizing qubit utility without compromising computational accuracy.
Scalable Circuit Cutting: A Framework for Combined Gate and Wire Cuts Using Gate Groups
arXiv:2608.05287v1 Announce Type: new Abstract: Quantum circuit cutting enables the execution of large circuits on devices with a limited number of qubits by partitioning circuits into independent subcircuits. However, this introduces a sampling overhead, which grows exponentially with the number of cuts, rendering the choice of cut placements critical for practical circuit cutting. Determining optimal cut placements remains computationally challenging, particularly as circuits grow in size. Additionally, existing circuit cutting approaches typically treat gate and wire cuts independently. Those combining both cutting approaches, however, do not take advantage of joint cutting, i.e., identifying common gate groups and cutting them jointly for a reduced overhead. This work presents a unified framework that combines gate and wire cutting within a single partitioning strategy, enabling more efficient circuit decompositions. Moreover, our approach incorporates joint cutting via a novel gate grouping technique, further reducing sampling overhead. By formulating the cut placement problem as a scalable graph partitioning task, our method efficiently identifies near-optimal cut placements for large circuits, also providing diagnostic feedback on whether circuits are suitable for cutting.
Abstract:Quantum circuit cutting enables the execution of large circuits on devices with a limited number of qubits by partitioning circuits into independent subcircuits. However, this introduces a sampling overhead, which grows exponentially with the number of cuts, rendering the choice of cut placements critical for practical circuit cutting. Determining optimal cut placements remains computationally challenging, particularly as circuits grow in size. Additionally, existing circuit cutting approaches typically treat gate and wire cuts independently. Those combining both cutting approaches, however, do not take advantage of joint cutting, i.e., identifying common gate groups and cutting them jointly for a reduced overhead. This work presents a unified framework that combines gate and wire cutting within a single partitioning strategy, enabling more efficient circuit decompositions. Moreover, our approach incorporates joint cutting via a novel gate grouping technique, further reducing sampling overhead. By formulating the cut placement problem as a scalable graph partitioning task, our method efficiently identifies near-optimal cut placements for large circuits, also providing diagnostic feedback on whether circuits are suitable for cutting.
Quantum Physics (quant-ph); Emerging Technologies (cs.ET)
arXiv:2608.05287 [quant-ph]
(or arXiv:2608.05287v1 [quant-ph] for this version)
https://doi.org/10.48550/arXiv.2608.05287 Focus to learn more arXiv-issued DOI via DataCite (pending registration)
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