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This research presents a novel pulse optimization technique for superconducting quantum processors that explicitly accounts for flux line memory effects. By modeling the actuator dynamics and suppressing error generators, the method maintains high-fidelity CZ gate operations across repeated sequences without requiring additional waiting time. This advancement directly addresses a critical limitation in conventional predistortion protocols, significantly improving sequence infidelity for scalable quantum hardware.
Robust CZ gate against flux line memory
arXiv:2609.00939v1 Announce Type: new Abstract: High-fidelity CZ gates are central to superconducting quantum processors, but implementations based on flux tuning are still sensitive to pulse distortion. Conventional predistortion, typically used for an isolated gate, can recover the desired flux at the chip but it fails if the flux line memory exists, causing the fidelity of repeated CZ gates to drop rapidly. To address this issue, we model the flux line distortion as the dynamics of a stateful classical actuator coupled to a quantum system. Using a first-order Dyson expansion, we derive the error generators induced by variations in the initial flux-line state. We then design a robust CZ gate by optimizing the flux pulse to suppress these generators and minimize the residual flux line state at the gate exit. A one-pole flux line model shows the expected first-order robustness plateau. For a more practical three-pole model, the optimized CZ pulse achieves $F_{\mathrm{avg}}=99.998\%$, suppresses all first-order error generators, and brings the residual flux line state close to zero. With no additional waiting time between gates, our robust pulse achieves $F_{\mathrm{avg}}=99.97\%$ for the complete ten-gate sequence and reduces the sequence infidelity by a factor of about $2.3\times10^{3}$ relative to the baseline under the same predistortion protocol. These results show that explicitly accounting for flux line memory maintains high-fidelity CZ operation across repeated gate sequences and addresses a key limitation of conventional predistortion.
Abstract:High-fidelity CZ gates are central to superconducting quantum processors, but implementations based on flux tuning are still sensitive to pulse distortion. Conventional predistortion, typically used for an isolated gate, can recover the desired flux at the chip but it fails if the flux line memory exists, causing the fidelity of repeated CZ gates to drop rapidly. To address this issue, we model the flux line distortion as the dynamics of a stateful classical actuator coupled to a quantum system. Using a first-order Dyson expansion, we derive the error generators induced by variations in the initial flux-line state. We then design a robust CZ gate by optimizing the flux pulse to suppress these generators and minimize the residual flux line state at the gate exit. A one-pole flux line model shows the expected first-order robustness plateau. For a more practical three-pole model, the optimized CZ pulse achieves $F_{\mathrm{avg}}=99.998\%$, suppresses all first-order error generators, and brings the residual flux line state close to zero. With no additional waiting time between gates, our robust pulse achieves $F_{\mathrm{avg}}=99.97\%$ for the complete ten-gate sequence and reduces the sequence infidelity by a factor of about $2.3\times10^{3}$ relative to the baseline under the same predistortion protocol. These results show that explicitly accounting for flux line memory maintains high-fidelity CZ operation across repeated gate sequences and addresses a key limitation of conventional predistortion.
arXiv:2609.00939 [quant-ph]
(or arXiv:2609.00939v1 [quant-ph] for this version)
https://doi.org/10.48550/arXiv.2609.00939 Focus to learn more arXiv-issued DOI via DataCite (pending registration)
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