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This research presents a physics-guided linear mapper that replaces opaque black-box models with an interpretable approach for quantum error mitigation in noisy-intermediate scale devices. By leveraging circuit complexity and calibration data, the method achieves significant RMSE reductions on multi-qubit circuits while enabling sub-millisecond inference speeds suitable for variational algorithms. Although currently validated only via simulators, the work establishes a crucial pathway toward integrating explainable machine learning directly into quantum hardware workflows.
Physics-Guided Linear Mapper for Quantum Error Mitigation
arXiv:2608.23109v1 Announce Type: new Abstract: We introduce a novel physics-guided linear mapper (PGLM) for quantum error mitigation that uses seven distinct interpretable features derived from circuit complexity and device calibration data. The goal is to provide a data-efficient, interpretable, and low-latency alternative to the black-box machine learning for quantum error mitigation in noisy-intermediate scale quantum devices. Evaluated on 52 simulated benchmark circuits (1--4 qubits), PGLM demonstrates strong performance in noise-accumulation regimes: 50.1% RMSE reduction on 3-qubit circuits and 32.3% on 4-qubit circuits, while single-qubit circuits show degraded performance. A circuit-size-aware deployment policy achieves 32.6% aggregate improvement. Sub-millisecond inference enables integration into variational algorithms, and analysis of learned coefficients reveals that circuit depth and CNOT count dominate error prediction, consistent with decoherence mechanisms. Results are simulator-based with idealized noise models; hardware validation remains essential future work.
Abstract:We introduce a novel physics-guided linear mapper (PGLM) for quantum error mitigation that uses seven distinct interpretable features derived from circuit complexity and device calibration data. The goal is to provide a data-efficient, interpretable, and low-latency alternative to the black-box machine learning for quantum error mitigation in noisy-intermediate scale quantum devices. Evaluated on 52 simulated benchmark circuits (1--4 qubits), PGLM demonstrates strong performance in noise-accumulation regimes: 50.1% RMSE reduction on 3-qubit circuits and 32.3% on 4-qubit circuits, while single-qubit circuits show degraded performance. A circuit-size-aware deployment policy achieves 32.6% aggregate improvement. Sub-millisecond inference enables integration into variational algorithms, and analysis of learned coefficients reveals that circuit depth and CNOT count dominate error prediction, consistent with decoherence mechanisms. Results are simulator-based with idealized noise models; hardware validation remains essential future work.
18 pages, 7 figures. Published in Intelligent Computing: Proceedings of the 2026 Computing Conference, Lecture Notes in Networks and Systems, vol. 1949, Springer, 2026
arXiv:2608.23109 [quant-ph]
(or arXiv:2608.23109v1 [quant-ph] for this version)
https://doi.org/10.48550/arXiv.2608.23109 arXiv-issued DOI via DataCite (pending registration)
Intelligent Computing, Lecture Notes in Networks and Systems, vol. 1949, pp. 749-765, Springer, 2026
https://doi.org/10.1007/978-3-032-24804-6_43 DOI(s) linking to related resources
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