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This research presents a novel parallel exact synthesis framework for quantum circuits using semi-tensor product theory, addressing critical bottlenecks in compilation scalability and memory usage. By converting circuit semantics into canonical formulas to solve gate direction assignments separately, the method achieves significant speedups over traditional SAT-based baselines on small instances while maintaining competitiveness on complex problems. The approach offers a practical optimization kernel for real-world workflows aiming to improve quantum compiler efficiency without relying solely on heuristic approximations.
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Parallelizable Exact Synthesis of Quantum Circuits via Semi-Tensor Product

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arXiv:2607.24195v1 Announce Type: new Abstract: Exact synthesis is a useful tool in quantum compilation by providing optimal alternative implementations of small circuit shards and is widely used as a circuit re-synthesis optimization kernel. However, existing exact synthesis methods suffer from encoding overhead, poor parallel scalability, and memory bottlenecks. This paper introduces a parallel exact synthesis framework for CNOT and phase polynomial circuits, which is based on the semi-tensor product (STP) theory of matrices. By enumerating undirected partial-gate topologies and solving the missing gate directions separately, we are able to parallelize both stages and achieve a parallel speedup of up to $12.8\times$ with 32 workers on this NP-hard problem. More specifically, for each topology, the circuit semantics are converted into canonical STP formulas, and feasibility is decided by a right-to-left factorization procedure that removes infeasible direction assignments. On randomly generated synthesis targets, STP is typically $100\times-1000\times$ faster than the SAT-based baseline on small instances, and remains competitive for more difficult instances. When integrated in a real-world circuit optimization workflow, our algorithm outperforms the SAT-based approach on 89% of cases in QASMBench, and achieves a median speedup of $1.91\times$.

Abstract:Exact synthesis is a useful tool in quantum compilation by providing optimal alternative implementations of small circuit shards and is widely used as a circuit re-synthesis optimization kernel. However, existing exact synthesis methods suffer from encoding overhead, poor parallel scalability, and memory bottlenecks. This paper introduces a parallel exact synthesis framework for CNOT and phase polynomial circuits, which is based on the semi-tensor product (STP) theory of matrices. By enumerating undirected partial-gate topologies and solving the missing gate directions separately, we are able to parallelize both stages and achieve a parallel speedup of up to $12.8\times$ with 32 workers on this NP-hard problem. More specifically, for each topology, the circuit semantics are converted into canonical STP formulas, and feasibility is decided by a right-to-left factorization procedure that removes infeasible direction assignments. On randomly generated synthesis targets, STP is typically $100\times-1000\times$ faster than the SAT-based baseline on small instances, and remains competitive for more difficult instances. When integrated in a real-world circuit optimization workflow, our algorithm outperforms the SAT-based approach on 89% of cases in QASMBench, and achieves a median speedup of $1.91\times$.

Quantum Physics (quant-ph); Emerging Technologies (cs.ET)

arXiv:2607.24195 [quant-ph]

(or arXiv:2607.24195v1 [quant-ph] for this version)

https://doi.org/10.48550/arXiv.2607.24195 Focus to learn more arXiv-issued DOI via DataCite (pending registration)

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