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Iceberg Quantum and Diraq have validated that their Pinnacle logical architecture can be successfully mapped to silicon spin-qubit hardware, achieving a projected 1,000 logical qubits from 150,000 physical qubits. This collaboration confirms that advanced fault-tolerant error correction is viable on spin-qubit platforms without requiring excessive hardware overhead compared to surface code approaches. The successful integration of NVIDIA CUDA-Q Logical further demonstrates the practical pathway toward scalable, high-performance quantum processors using standard CMOS manufacturing.
Logical advantage of Pinnacle confirmed on spin-qubit hardware

Iceberg Quantum and Diraq confirm Pinnacle’s logical advantage for spin qubits using NVIDIA CUDA-Q Logical. The work demonstrated how Iceberg Quantum’s Pinnacle architecture can be implemented on Diraq's spin-qubit hardware platform while preserving Pinnacle's logical performance advantage, enabling Diraq to achieve a target 1,000 logical qubits with just 150,000 physical qubits.
Diraq has demonstrated a path to achieving 1,000 logical qubits with just 150,000 physical qubits, a performance enabled by Iceberg Quantum’s Pinnacle architecture and detailed in Diraq’s white paper, The Case for Silicon, the company says. This result challenges the expectation that quantum low-density parity-check architectures demand more complex hardware than surface code approaches. The collaboration used early access to NVIDIA CUDA-Q Logical to successfully map Pinnacle to Diraq’s silicon spin-qubit platform while minimizing error accumulation from qubit movement. “This work demonstrates that we can place…
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