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This research addresses a critical bottleneck in AI infrastructure by introducing an algorithm that dynamically reroutes data around defective nodes in 3D chip networks, ensuring system uptime despite manufacturing imperfections or silicon degradation. By significantly outperforming existing routing methods in both speed and path accuracy, LRF-3D enhances the reliability of high-performance computing clusters essential for training large models and running inference workloads.
HSE and Samara University boost chip reliability with new algorithm
Researchers from HSE MIEM and Samara University have developed the LRF-3D algorithm to automatically bypass idle nodes in three-dimensional networks-on-chip, improving processor reliability for data centres, supercomputers, and AI computing. The algorithm outperforms existing solutions in both speed and path accuracy, accounting for manufacturing defects or crystal degradation that can cause network nodes to malfunction.
Researchers from HSE MIEM and Samara University have created LRF-3D, a new algorithm that enhances processor reliability by automatically bypassing faulty nodes within three-dimensional networks-on-chip. The system employs a hierarchy of eight local algorithms to address…
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