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This paper introduces the Iterative Redecode Scheme (IRS), a propagation-assisted local decoding framework that significantly outperforms existing protocols like ghost decoding and logical observable matching on deep transversal Clifford circuits. By utilizing local memory-style detectors and Pauli-frame propagation, the method achieves up to 25x lower logical error rates in specific regimes while maintaining efficiency through early saturation of error rates. The work advances fault-tolerant quantum computing by demonstrating that high-accuracy correlated decoding is feasible without requiring global hypergraph decoding for these critical operations.
High-Accuracy Propagation-Assisted Local Decoding for Fast Transversal Clifford Circuits
arXiv:2610.26784v1 Announce Type: new Abstract: We benchmark the Iterative Redecode Scheme (IRS) on fast transversal Clifford circuits, achieving high-accuracy correlated decoding using local memory-style detectors and decoders. On a deep random Clifford benchmark, IRS yields approximately $4\times$ lower logical failure rates than the ghost protocol at $d=11$ with matched buffers, and $15\times$ lower rates than logical observable matching (LOM). In three-block GHZ preparation, IRS achieves $2\times$ lower logical error rates than reliable logical Pauli-product decoding with matched initialisation, improving to $25\times$ at $d=19$ with $\lceil d/2\rceil$ full initialisation rounds. We place IRS, which builds on Wan et al.'s scheme, within a broader propagation-assisted local (PAL) framework, where local decoders exchange messages rather than decoding a global hypergraph. IRS alternates local minimum-weight perfect matching (MWPM) on memory-equivalent detector error models (DEMs) with Pauli-frame propagation and detector updates across transversal CNOT layers, seeking local error estimates consistent with the global detector record. Prior-informed DEMs account for probabilities of propagated errors missing from the memory-equivalent model, improving initial decoding and reducing logical error rates. Zero-weight physical Pauli mechanisms enable inference and propagation of initially indeterminate stabilizer outcomes. Error rates saturate after a few iterations even for deep, adversarial alternating-tCNOT circuits, allowing iteration caps with negligible loss of accuracy. We find syndrome-extraction buffers of order $\lfloor d/4\rfloor$ sufficient for distance-dependent error suppression in the demanding regimes studied. The approach extends to other local decoders and CSS codes; for repeated logical $S$ gates, IRS achieves approximately $4$ to $10\times$ lower logical error rates than LOM, depending on initialisation.
Abstract:We benchmark the Iterative Redecode Scheme (IRS) on fast transversal Clifford circuits, achieving high-accuracy correlated decoding using local memory-style detectors and decoders. On a deep random Clifford benchmark, IRS yields approximately $4\times$ lower logical failure rates than the ghost protocol at $d=11$ with matched buffers, and $15\times$ lower rates than logical observable matching (LOM). In three-block GHZ preparation, IRS achieves $2\times$ lower logical error rates than reliable logical Pauli-product decoding with matched initialisation, improving to $25\times$ at $d=19$ with $\lceil d/2\rceil$ full initialisation rounds. We place IRS, which builds on Wan et al.'s scheme, within a broader propagation-assisted local (PAL) framework, where local decoders exchange messages rather than decoding a global hypergraph. IRS alternates local minimum-weight perfect matching (MWPM) on memory-equivalent detector error models (DEMs) with Pauli-frame propagation and detector updates across transversal CNOT layers, seeking local error estimates consistent with the global detector record. Prior-informed DEMs account for probabilities of propagated errors missing from the memory-equivalent model, improving initial decoding and reducing logical error rates. Zero-weight physical Pauli mechanisms enable inference and propagation of initially indeterminate stabilizer outcomes. Error rates saturate after a few iterations even for deep, adversarial alternating-tCNOT circuits, allowing iteration caps with negligible loss of accuracy. We find syndrome-extraction buffers of order $\lfloor d/4\rfloor$ sufficient for distance-dependent error suppression in the demanding regimes studied. The approach extends to other local decoders and CSS codes; for repeated logical $S$ gates, IRS achieves approximately $4$ to $10\times$ lower logical error rates than LOM, depending on initialisation.
22 pages, 13 figures (including appendix). Supporting simulation circuits and numerical data available at this https URL
arXiv:2610.26784 [quant-ph]
(or arXiv:2610.26784v1 [quant-ph] for this version)
https://doi.org/10.48550/arXiv.2610.26784 Focus to learn more arXiv-issued DOI via DataCite
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