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This paper addresses critical circuit design challenges in implementing binary polynomial formulations on near-term quantum hardware, specifically targeting the overhead caused by missing high-order gates. The authors introduce Tempura, a scalable heuristic method that generates significantly shallower circuits than current state-of-the-art approaches while maintaining competitive runtime performance. These findings are vital for advancing practical quantum optimization algorithms that can operate within the constraints of existing NISQ devices.
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Circuit Design Problems in Binary Polynomial Quantum Optimization

arXiv2 min de cititArticolul și perspectiva sunt în engleză.

arXiv:2610.13283v1 Announce Type: new Abstract: Solving combinatorial optimization problems on near-term quantum computers mainly relies on their quadratic unconstrained binary formulation. Lately, binary polynomial formulations start to take the center stage, having a better scaling with respect to the number of used qubits. However, while quadratic forms are straightforward to implement on quantum circuits, polynomial forms of degree $d$ incur in circuit depth overheads, due to the lack of $d$-qubit gates, for $d\geq 3$, on current hardware. In this paper, we study the problem of designing the shallowest quantum circuit for a given polynomial form. We formulate it as a classical binary linear problem and we prove the \textsf{NP}-completeness of a variant of it. On the algorithmic side, we offer a scalable and performant heuristic method to tackle it, Tempura, as well as faster binary linear problem formulations, which offer computational feasibility while sacrificing optimality. Our performance evaluation shows that the algorithms yield far shorter circuits than the state-of-the-art approaches, and Tempura is mostly comparable with them in terms of runtime.

Abstract:Solving combinatorial optimization problems on near-term quantum computers mainly relies on their quadratic unconstrained binary formulation. Lately, binary polynomial formulations start to take the center stage, having a better scaling with respect to the number of used qubits. However, while quadratic forms are straightforward to implement on quantum circuits, polynomial forms of degree $d$ incur in circuit depth overheads, due to the lack of $d$-qubit gates, for $d\geq 3$, on current hardware. In this paper, we study the problem of designing the shallowest quantum circuit for a given polynomial form. We formulate it as a classical binary linear problem and we prove the \textsf{NP}-completeness of a variant of it. On the algorithmic side, we offer a scalable and performant heuristic method to tackle it, Tempura, as well as faster binary linear problem formulations, which offer computational feasibility while sacrificing optimality. Our performance evaluation shows that the algorithms yield far shorter circuits than the state-of-the-art approaches, and Tempura is mostly comparable with them in terms of runtime.

arXiv:2610.13283 [quant-ph]

(or arXiv:2610.13283v1 [quant-ph] for this version)

https://doi.org/10.48550/arXiv.2610.13283 Focus to learn more arXiv-issued DOI via DataCite (pending registration)

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