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BigPower utilizes large language models to estimate CPU module power consumption directly from source-level code, eliminating the need for time-consuming simulation during inference. This approach offers hardware architects and researchers a scalable method to analyze energy efficiency across diverse processor configurations without relying on post-silicon data or heavy computational simulations. By bridging architectural hierarchy with LLM representations, it provides an efficient alternative for optimizing power behavior in modern CPU designs.
BigPower: Hierarchical Source-Level Module Power Estimation for CPUs with Large Language Models
arXiv:2606.13747v1 Announce Type: cross Abstract: Accurate power estimation is important for understanding and optimizing CPU power behavior, yet practical workflows often rely on simulation-derived information or post-silicon analysis. In this work, we present BigPower, a hierarchical source-level surrogate model for fine-grained module-level power estimation during CPU design. BigPower leverages large language model-based representations together with architectural hierarchy, module connectivity, configuration parameters, and workload context to estimate module-level power consumption directly from source-level design information, without requiring additional simulation during inference. Experimental results in the open-source XiangShan processor family demonstrate practical fine-grained power estimation across diverse configurations and workloads, offering an efficient alternative to conventional simulation-based workflows.
Abstract:Accurate power estimation is important for understanding and optimizing CPU power behavior, yet practical workflows often rely on simulation-derived information or post-silicon analysis. In this work, we present BigPower, a hierarchical source-level surrogate model for fine-grained module-level power estimation during CPU design. BigPower leverages large language model-based representations together with architectural hierarchy, module connectivity, configuration parameters, and workload context to estimate module-level power consumption directly from source-level design information, without requiring additional simulation during inference. Experimental results in the open-source XiangShan processor family demonstrate practical fine-grained power estimation across diverse configurations and workloads, offering an efficient alternative to conventional simulation-based workflows.
Hardware Architecture (cs.AR); Machine Learning (cs.LG)
arXiv:2606.13747 [cs.AR]
(or arXiv:2606.13747v1 [cs.AR] for this version)
https://doi.org/10.48550/arXiv.2606.13747 Focus to learn more arXiv-issued DOI via DataCite
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