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This research demonstrates a scalable pipeline using LLMs to automate the extraction and prioritization of supply chain risks from semiconductor corporate disclosures. By integrating algorithmic scoring with expert validation, the system constructs dynamic chance-and-risk matrices that effectively identify dominant threats like trade restrictions across multiple companies. The approach offers a practical framework for leveraging AI to enhance risk intelligence in complex, geopolitically sensitive hardware ecosystems.
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A systematic Approach to constructing a Chance-and-Risk Matrix for Semiconductor Supply Chains

arXiv2 min de cititArticolul și perspectiva sunt în engleză.

arXiv:2609.01563v1 Announce Type: new Abstract: Semiconductor supply chains face escalating risks from geopolitical tensions, geographic concentration, and rapid technological shifts, yet no scalable system continuously extracts, structures, and prioritizes risk intelligence from public corporate disclosures. We present an end-to-end pipeline that retrieves corporate documents for semiconductor companies and uses large language models (LLMs) to extract the risks and opportunities they describe. It organizes these into a knowledge graph linking each item to its category, sources, and related events, then merges duplicates and ranks them with a three-layer mechanism combining an algorithmic formula, an LLM relevance adjustment, and expert validation. Applied to five companies across the value chain, the pipeline produces 76,207 scored items, of which an independent check finds 92.6% valid. The automated rankings match expert judgment at an average Spearman correlation of 0.55 for risks and 0.72 for opportunities, and the resulting matrices identify trade restrictions as the dominant cross-company risk.

Abstract:Semiconductor supply chains face escalating risks from geopolitical tensions, geographic concentration, and rapid technological shifts, yet no scalable system continuously extracts, structures, and prioritizes risk intelligence from public corporate disclosures. We present an end-to-end pipeline that retrieves corporate documents for semiconductor companies and uses large language models (LLMs) to extract the risks and opportunities they describe. It organizes these into a knowledge graph linking each item to its category, sources, and related events, then merges duplicates and ranks them with a three-layer mechanism combining an algorithmic formula, an LLM relevance adjustment, and expert validation. Applied to five companies across the value chain, the pipeline produces 76,207 scored items, of which an independent check finds 92.6% valid. The automated rankings match expert judgment at an average Spearman correlation of 0.55 for risks and 0.72 for opportunities, and the resulting matrices identify trade restrictions as the dominant cross-company risk.

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Computation and Language (cs.CL)

arXiv:2609.01563 [cs.CL]

(or arXiv:2609.01563v1 [cs.CL] for this version)

https://doi.org/10.48550/arXiv.2609.01563 arXiv-issued DOI via DataCite (pending registration)

From: Alexander Fichtl M.Sc. [view email] [v1] Tue, 1 Sep 2026 17:30:39 UTC (1,652 KB)

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