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This story is about semiconductor fabrication, but it's tied to AI infrastructure: TSMC cites rising AI demand as the reason for moving its Kumamoto plant to 3nm. The 6,000-wafer monthly capacity is the key number for gauging how much advanced AI-grade silicon Japan can add. Readers should watch whether this capacity is dedicated to AI accelerators or spread across general-purpose products.
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TSMC's Kumamoto Plant 2 Approved for 3nm Chip Production, With Monthly Capacity of 6,000 Wafers

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According to reports, Japan's Ministry of Economy, Trade and Industry recently announced approval of TSMC's plan to produce advanced semiconductors using the 3-nanometer process at its second factory in Kumamoto Prefecture. This will mark the first production of 3nm chips domestically in Japan. Under the new production plan, monthly output capacity for 3nm chips is set at 6,000 wafers. TSMC originally intended to manufacture semiconductors using the 6nm and 12nm processes at this facility; the change in production plan reflects an assessment of rising AI demand, prompting a switch to higher-performance products. (Jiemian)

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